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Frontiers of Information Technology & Electronic Engineering

ISSN 2095-9184 (print), ISSN 2095-9230 (online)

An efficient prediction framework for multi-parametric yield analysis under parameter variations

Abstract: Due to continuous process scaling, process, voltage, and temperature (PVT) parameter variations have become one of the most problematic issues in circuit design. The resulting correlations among performance metrics lead to a significant parametric yield loss. Previous algorithms on parametric yield prediction are limited to predicting a single-parametric yield or performing balanced optimization for several single-parametric yields. Consequently, these methods fail to predict the multi- parametric yield that optimizes multiple performance metrics simultaneously, which may result in significant accuracy loss. In this paper we suggest an efficient multi-parametric yield prediction framework, in which multiple performance metrics are considered as simultaneous constraint conditions for parametric yield prediction, to maintain the correlations among metrics. First, the framework models the performance metrics in terms of PVT parameter variations by using the adaptive elastic net (AEN) method. Then the parametric yield for a single performance metric can be predicted through the computation of the cumulative distribution function (CDF) based on the multiplication theorem and the Markov chain Monte Carlo (MCMC) method. Finally, a copula-based parametric yield prediction procedure has been developed to solve the multi-parametric yield prediction problem, and to generate an accurate yield estimate. Experimental results demonstrate that the proposed multi-parametric yield prediction framework is able to provide the designer with either an accurate value for parametric yield under specific performance limits, or a multi-parametric yield surface under all ranges of performance limits.

Key words: Yield prediction, Parameter variations, Multi-parametric yield, Performance modeling, Sparse representation

Chinese Summary  <28> 考虑设计参数扰动的芯片多元参数成品率预测算法

概要:随着芯片制造工艺的进步,工艺参数、供电电压及片上温度(Process, voltage, and temperature, PVT)等设计参数扰动已成为芯片设计过程的棘手问题,其所产生的性能指标间相关性将导致芯片参数成品率显著下降。但是,当前芯片参数成品率预测算法主要局限于单一性能指标成品率预测或对多个单性能指标成品率进行均衡优化,而不能同时针对多个性能指标约束进行多元参数成品率预测,易造成参数成品率精度缺失。基于以上问题,本文将多个性能指标同时作为约束条件,提出一种芯片多元参数成品率预测方法。该方法首先考虑PVT参数扰动,利用自适应弹性网(Adaptive elastic net, AEN)对芯片性能指标进行建模。然后,基于乘法定理及马尔科夫链蒙特卡罗法,通过求解累积分布函数(Cumulative distribution function, CDF)对单一性能指标的芯片参数成品率进行预测。最后,同时考虑多个芯片性能指标约束,根据Copula方法准确预测芯片多元参数成品率。实验结果表明,本文方法可以在指定性能指标约束下对芯片多元参数成品率进行有效预测,并可为芯片设计人员提供任意性能指标约束下的多元参数成品率预测曲面。

关键词组:成品率预测;参数扰动;多元参数成品率;性能建模;稀疏表示


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DOI:

10.1631/FITEE.1601225

CLC number:

TP312

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On-line Access:

2016-12-13

Received:

2016-05-16

Revision Accepted:

2016-09-11

Crosschecked:

2016-11-08

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