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Frontiers of Information Technology & Electronic Engineering

ISSN 2095-9184 (print), ISSN 2095-9230 (online)

A fuzzy integrated congestion-aware routing algorithm for network on chip

Abstract: Network on chip (NoC) is an infrastructure providing a communication platform to multiprocessor chips. Furthermore, the wormhole-switching method, which shares resources, was used to increase its efficiency; however, this can lead to congestion. Moreover, dealing with this congestion consumes more energy and correspondingly leads to increase in power consumption. Furthermore, consuming more power results in more heat and increases thermal fluctuations that lessen the life span of the infrastructures and, more importantly, the network’s performance. Given these complications, providing a method that controls congestion is a significant design challenge. In this paper, a fuzzy logic congestion control routing algorithm is presented to enhance the NoC’s performance when facing congestion. To avoid congestion, the proposed algorithm employs the occupied input buffer and the total occupied buffers of the neighboring nodes along with the maximum possible path diversity with minimal path length from instant neighbors to the destination as the selection parameters. To enhance the path selection function, the uncertainty of the fuzzy logic algorithm is used. As a result, the average delay, power consumption, and maximum delay are reduced by 14.88%, 7.98%, and 19.39%, respectively. Additionally, the proposed method enhances the throughput and the total number of packets received by 14.9% and 11.59%, respectively. To show the significance, the proposed algorithm is examined using transpose traffic patterns, and the average delay is improved by 15.3%. The average delay is reduced by 3.8% in TMPEG-4 (treble MPEG-4), 36.6% in QPIP (quadruplicate PIP), and 20.9% in TVOPD (treble VOPD).

Key words: Network on chip, Routing algorithm, Congestion control, Fuzzy logic

Chinese Summary  <20> 面向片上网络的一种模糊集成拥塞感知路由算法

Shahrouz YASREBI1,Akram REZA1,Mohammad NIKRAVAN1,Seena VAZIFEDAN2
1伊斯兰阿扎德大学Shahr-e-Qods分校计算机工程系,伊朗德黑兰市
2伊斯兰阿扎德大学科学与研究分校计算机体系结构系,伊朗德黑兰市

摘要:片上网络(NoC)是一种为多处理器芯片提供通信平台的基础设施。共享资源的虫孔交换方法在提升其效率的同时,也可能导致拥塞问题的出现。然而,处理这种拥塞问题需更多能耗,从而增加了耗电量。此外,耗电量的增加会产生更多热量并加剧热量波动,从而削减基础设施寿命,更严重的是降低网络性能。考虑到这些复杂性,提出控制拥塞的方法是一个重大挑战。本文提出一种模糊逻辑拥塞控制路由算法,以提高NoC在面对拥塞时的性能。为避免拥塞,所提算法采用被占用的输入缓冲区、相邻节点的总占用缓冲区以及从瞬时相邻节点到终点最短路径下最大可能的路径多样性作为选择参数。为强化路径选择函数,利用了模糊逻辑算法的不确定性。结果表明,平均时延、功耗和最大时延分别降低14.88%、7.98%和19.39%。此外,该方法提高了14.9%的吞吐量和11.59%的接收数据包总数。为凸显所提算法的重要性,采用转置流量模式进行检验,平均延迟改善15.3%。TMPEG-4(三倍MPEG-4)、QPIP(四倍PIP)和TVOPD(三倍VOPD)的平均延迟分别降低3.8%、36.6%和20.9%。

关键词组:片上网络;路由算法;拥塞控制;模糊逻辑


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DOI:

10.1631/FITEE.2000069

CLC number:

TN913

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On-line Access:

2021-05-17

Received:

2020-02-11

Revision Accepted:

2020-06-16

Crosschecked:

2021-03-29

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