Abstract: Reversible logic has recently gained significant interest due to its inherent ability to reduce energy dissipation, which is the primary need for low-power digital circuits. One of the newest areas of relevant study is reversible logic, which has applications in many areas, including nanotechnology, DNA computing, quantum computing, fault tolerance, and low-power complementary metal-oxide-semiconductor (CMOS). An electrical circuit is classified as reversible if it has an equal number of inputs and outputs, and a one-to-one relationship. A reversible circuit is conservative if the EXOR of the inputs and the EXOR of the outputs are equivalent. In addition, quantum-dot cellular automata (QCA) is one of the state-of-the-art approaches that can be used as an alternative to traditional technologies. Hence, we propose an efficient conservative gate with low power demand and high speed in this paper. First, we present a reversible gate called ANG (Ahmadpour Navimipour Gate). Then, two non-resistant QCA ANG and reversible fault-tolerant ANG structures are implemented in QCA technology. The suggested reversible gate is realized through the Miller algorithm. Subsequently, reversible fault-tolerant ANG is implemented by the 2DW clocking scheme. Furthermore, the power consumption of the suggested ANG is assessed under different energy ranges (0.5Ek, 1.0Ek, and 1.5Ek). Simulations of the structures and analysis of their power consumption are performed using QCADesigner 2.0.03 and QCAPro software. The proposed gate shows great improvements compared to recent designs.

Key words: Nanotechnology; Reversible logic; Energy dissipation; Quantum-dot cellular automata (QCA); Reversible gate; Miller algorithm

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