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Received: 2007-09-28

Revision Accepted: 2007-11-04

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Journal of Zhejiang University SCIENCE A 2007 Vol.8 No.12 P.1879-1883


A robust polysilicon-assisted SCR in ESD protection application

Author(s):  CUI Qiang, HAN Yan, DONG Shu-rong, LIOU Juin-jie

Affiliation(s):  ESD Lab, Institute of Microelectronics and Photoelectronics, Zhejiang University, Hangzhou 310027, China; more

Corresponding email(s):   hany@zju.edu.cn

Key Words:  Electro-static discharge (ESD), Silicon-controlled rectifier (SCR), Robustness performance, Polysilicon-assisted, Human body model (HBM)

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CUI Qiang, HAN Yan, DONG Shu-rong, LIOU Juin-jie. A robust polysilicon-assisted SCR in ESD protection application[J]. Journal of Zhejiang University Science A, 2007, 8(12): 1879-1883.

@article{title="A robust polysilicon-assisted SCR in ESD protection application",
author="CUI Qiang, HAN Yan, DONG Shu-rong, LIOU Juin-jie",
journal="Journal of Zhejiang University Science A",
publisher="Zhejiang University Press & Springer",

%0 Journal Article
%T A robust polysilicon-assisted SCR in ESD protection application
%A CUI Qiang
%A HAN Yan
%A DONG Shu-rong
%A LIOU Juin-jie
%J Journal of Zhejiang University SCIENCE A
%V 8
%N 12
%P 1879-1883
%@ 1673-565X
%D 2007
%I Zhejiang University Press & Springer
%DOI 10.1631/jzus.2007.A1879

T1 - A robust polysilicon-assisted SCR in ESD protection application
A1 - CUI Qiang
A1 - HAN Yan
A1 - DONG Shu-rong
A1 - LIOU Juin-jie
J0 - Journal of Zhejiang University Science A
VL - 8
IS - 12
SP - 1879
EP - 1883
%@ 1673-565X
Y1 - 2007
PB - Zhejiang University Press & Springer
ER -
DOI - 10.1631/jzus.2007.A1879

A novel polysilicon-assisted silicon-controlled rectifier (SCR) is presented and analyzed in this paper, which is fabricated in HHNEC’s 0.18 μm EEPROM process. The polysilicon-assisted SCRs take advantage of polysilicon layer to help bypass electro-static discharge (ESD) current without occupying extra layout area. TLP current-voltage (I-V) measurement results show that given the same layout areas, robustness performance of polysilicon-assisted SCRs can be improved to 3 times of conventional MLSCR’s. Moreover, one-finger such polysilicon-assisted SCRs, which occupy only 947 μm2 layout area, can undergo 7-kV HBM ESD stress. Results further demonstrate that the S-type I-V characteristics of polysilicon-assisted SCRs are adjustable to different operating conditions by changing the device dimensions. Compared with traditional SCRs, this new SCR can bypass more ESD currents and consumes smaller IC area.

Darkslateblue:Affiliate; Royal Blue:Author; Turquoise:Article


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