Full Text:   <3856>

CLC number: TN4

On-line Access: 2024-08-27

Received: 2023-10-17

Revision Accepted: 2024-05-08

Crosschecked: 2009-01-12

Cited: 5

Clicked: 6144

Citations:  Bibtex RefMan EndNote GB/T7714

-   Go to

Article info.
1. Reference List
Open peer comments

Journal of Zhejiang University SCIENCE A 2009 Vol.10 No.2 P.179-183

http://doi.org/10.1631/jzus.A0820262


New design of sense amplifier for EEPROM memory


Author(s):  Dong-sheng LIU, Xue-cheng ZOU, Qiong YU, Fan ZHANG

Affiliation(s):  Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, China

Corresponding email(s):   liu.dongsheng@gmail.com

Key Words:  EEPROM, Sense amplifier (SA), Voltage sensing, Bidirectional conduction


Dong-sheng LIU, Xue-cheng ZOU, Qiong YU, Fan ZHANG. New design of sense amplifier for EEPROM memory[J]. Journal of Zhejiang University Science A, 2009, 10(2): 179-183.

@article{title="New design of sense amplifier for EEPROM memory",
author="Dong-sheng LIU, Xue-cheng ZOU, Qiong YU, Fan ZHANG",
journal="Journal of Zhejiang University Science A",
volume="10",
number="2",
pages="179-183",
year="2009",
publisher="Zhejiang University Press & Springer",
doi="10.1631/jzus.A0820262"
}

%0 Journal Article
%T New design of sense amplifier for EEPROM memory
%A Dong-sheng LIU
%A Xue-cheng ZOU
%A Qiong YU
%A Fan ZHANG
%J Journal of Zhejiang University SCIENCE A
%V 10
%N 2
%P 179-183
%@ 1673-565X
%D 2009
%I Zhejiang University Press & Springer
%DOI 10.1631/jzus.A0820262

TY - JOUR
T1 - New design of sense amplifier for EEPROM memory
A1 - Dong-sheng LIU
A1 - Xue-cheng ZOU
A1 - Qiong YU
A1 - Fan ZHANG
J0 - Journal of Zhejiang University Science A
VL - 10
IS - 2
SP - 179
EP - 183
%@ 1673-565X
Y1 - 2009
PB - Zhejiang University Press & Springer
ER -
DOI - 10.1631/jzus.A0820262


Abstract: 
We present a new sense amplifier circuit for EEPROM memory. The topology of the sense amplifier uses a voltage sensing method, having low cost and low power consumption as well as high reliability. The sense amplifier was implemented in an EEPROM realized with an SMIC 0.35-μm 2P3M CMOS embedded EEPROM process. Under the condition that the power supply is 3.3 V, simulation results showed that the charge time is 35 ns in the proposed sense amplifier, and that the maximum average current consumption during the read period is 40 μA. The novel topology allows the circuit to function with power supplies as low as 1.4 V. The sense amplifier has been implemented in 2-kb EEPROM memory for RFID tag IC applications, and has a silicon area of only 240 μm2.

Darkslateblue:Affiliate; Royal Blue:Author; Turquoise:Article

Reference

[1] Barnett, R., Liu, J., 2007. An EEPROM Programming Controller for Passive UHF RFID Transponders with Gated Clock Regulation Loop and Current Surge Control. IEEE Custom Integrated Circuits Conf., p.393-396.

[2] Canet, P., Lalande, F., Razafindramora, J., 2004. Integrated Reliability in EEPROM Nonvolatile Memory Cell Design. Non-volatile Memory Technology Symp., p.66-69.

[3] Conte, A., Giudice, G.L., Palumbo, G., Signorello, A., 2005. A high-performance very low-voltage current sense amplifier for nonvolatile memories. IEEE J. Solid-State Circuits, 40(2):507-514.

[4] Daga, J.M., Papaix, C., Merandat, M., Richard, S., Medulla, G., Guichaoua, J., Auvergne, D., 2003. Design techniques for EEPROM’s embedded in portable system on chips. IEEE Des. Test Comput., 20(1):68-75.

[5] Haraszti, T., 2001. CMOS Memory Circuits. University of Boston Press, Inc., Boston, p.62-63.

[6] Liu, D.S., Zou, X.C., Zhang, F., Deng, M., 2006. Embeded EEPROM memory achieving lower power—new design of EEPROM memory for RFID tag IC. IEEE Circuits Dev. Mag., 22(6):53-59.

[7] Miyawaki, Y., Nakayama, T., Mihara, M., Kawai, S., Ohkawa, M., Ajika, N., Hatanaka, M., Terada, Y., Yoshihara, T., 1994. An Over-erasure Detection Technique for Tightening Vth Distribution for Low Voltage Operation Nor Type Flash Memory. Proc. IEEE Symp. on VLSI Circuits Symp., p.63-64.

[8] Na, K.Y., Kim, Y.S., Kim, Y.S., 2007. A novel single polysilicon EEPROM cell with a polyfinger capacitor. IEEE Electron Dev. Lett., 28(11):1047-1049.

[9] Otsuka, N., Horowitz, M.A., 1997. Circuit techniques for 1.5-V power supply flash memory. IEEE J. Solid-State Circuits, 32(8):1217-1230.

[10] Palumbo, G., Pappalardo, D., 2006. Charge pump circuits with only capacitive loads: optimized design. IEEE Trans. Circuits Syst. II: Express Briefs, 53(2):128-132.

[11] Pillai, V., Heinrich, H., Dieska, D., Nikitin, P.V., Martinez, R., Rao, K.V.S., 2007. An ultra-low-power long range battery/passive RFID tag for UHF and microwave bands with a current consumption of 700 nA at 1.5 V. IEEE Trans. Circuits Syst. I: Regular Papers, 54(7):1500-1512.

[12] Raguet, J.R., Bidal, V., Regnier, A., Mirabel, J.M., Laffont, R., Bouchakour, R., 2007. New EEPROM Concept for Single Bit Operation. Int. Semiconductor Device Research Symp., p.1-2.

[13] Regnier, A., Portal, J.M., Aziza, H., Masson, P., Bouchakour, R., Relliaud, C., Nee, D., Mirabel, J.M., 2006. EEPROM Compact Model with SILC Simulation Capability. 7th Annual Non-volatile Memory Technology Symp., p.26-30.

[14] Sergey, S., Sergey, M., 2007. The Read Operation Impact on Charge Stored in the EEPROM Cell. Int. Conf. on “Computer as a Tool”, p.1957-1959.

[15] Walsh, J., Scott, G., 2006. High-temperature, High Reliability EEPROM Design for Automotive Applications. IEEE Custom Integrated Circuits Conf., p.449-452.

[16] Xu, F., He, X.Q., Zhang, L., 2004. Key Design Techniques of a 40 ns 16 Kbit Embedded EEPROM Memory. Int. Conf. on Communications, Circuits and Systems, p.1516-1520.

Open peer comments: Debate/Discuss/Question/Opinion

<1>

Please provide your name, email address and a comment





Journal of Zhejiang University-SCIENCE, 38 Zheda Road, Hangzhou 310027, China
Tel: +86-571-87952783; E-mail: cjzhang@zju.edu.cn
Copyright © 2000 - 2024 Journal of Zhejiang University-SCIENCE