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Received: 2008-04-06

Revision Accepted: 2008-07-07

Crosschecked: 2009-01-12

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Citations:  Bibtex RefMan EndNote GB/T7714

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Journal of Zhejiang University SCIENCE A 2009 Vol.10 No.2 P.179-183


New design of sense amplifier for EEPROM memory

Author(s):  Dong-sheng LIU, Xue-cheng ZOU, Qiong YU, Fan ZHANG

Affiliation(s):  Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan 430074, China

Corresponding email(s):   liu.dongsheng@gmail.com

Key Words:  EEPROM, Sense amplifier (SA), Voltage sensing, Bidirectional conduction

Dong-sheng LIU, Xue-cheng ZOU, Qiong YU, Fan ZHANG. New design of sense amplifier for EEPROM memory[J]. Journal of Zhejiang University Science A, 2009, 10(2): 179-183.

@article{title="New design of sense amplifier for EEPROM memory",
author="Dong-sheng LIU, Xue-cheng ZOU, Qiong YU, Fan ZHANG",
journal="Journal of Zhejiang University Science A",
publisher="Zhejiang University Press & Springer",

%0 Journal Article
%T New design of sense amplifier for EEPROM memory
%A Dong-sheng LIU
%A Xue-cheng ZOU
%A Qiong YU
%J Journal of Zhejiang University SCIENCE A
%V 10
%N 2
%P 179-183
%@ 1673-565X
%D 2009
%I Zhejiang University Press & Springer
%DOI 10.1631/jzus.A0820262

T1 - New design of sense amplifier for EEPROM memory
A1 - Dong-sheng LIU
A1 - Xue-cheng ZOU
A1 - Qiong YU
A1 - Fan ZHANG
J0 - Journal of Zhejiang University Science A
VL - 10
IS - 2
SP - 179
EP - 183
%@ 1673-565X
Y1 - 2009
PB - Zhejiang University Press & Springer
ER -
DOI - 10.1631/jzus.A0820262

We present a new sense amplifier circuit for EEPROM memory. The topology of the sense amplifier uses a voltage sensing method, having low cost and low power consumption as well as high reliability. The sense amplifier was implemented in an EEPROM realized with an SMIC 0.35-μm 2P3M CMOS embedded EEPROM process. Under the condition that the power supply is 3.3 V, simulation results showed that the charge time is 35 ns in the proposed sense amplifier, and that the maximum average current consumption during the read period is 40 μA. The novel topology allows the circuit to function with power supplies as low as 1.4 V. The sense amplifier has been implemented in 2-kb EEPROM memory for RFID tag IC applications, and has a silicon area of only 240 μm2.

Darkslateblue:Affiliate; Royal Blue:Author; Turquoise:Article


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