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CLC number: TP331.2

On-line Access: 2024-08-27

Received: 2023-10-17

Revision Accepted: 2024-05-08

Crosschecked: 2017-11-20

Cited: 0

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Citations:  Bibtex RefMan EndNote GB/T7714

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Frontiers of Information Technology & Electronic Engineering  2017 Vol.18 No.11 P.1784-1794

http://doi.org/10.1631/FITEE.1601265


A highly efficient reconfigurable rotation unit based on an inverse butterfly network


Author(s):  Chao Ma, Zi-bin Dai, Wei Li, Hai-juan Zang

Affiliation(s):  Department of Electrical Engineering, Zhengzhou Institute of Information Science and Technology, Zhengzhou 450004, China; more

Corresponding email(s):   wenlu_ma@163.com, Daizb2004@126.com

Key Words:  Rotation operations, Self-routing, Control-bit generation algorithm, Inverse butterfly network



Abstract: 
We propose a reconfigurable control-bit generation algorithm for rotation and sub-word rotation operations. The algorithm uses a self-routing characteristic to configure an inverse butterfly network. In addition to being highly parallelized and inexpensive, the algorithm integrates the rotation-shift, bi-directional rotation-shift, and sub-word rotation-shift operations. To our best knowledge, this is the first scheme to accommodate a variety of rotation operations into the same architecture. We have developed the highly efficient reconfigurable rotation unit (HERRU) and synthesized it into the Semiconductor Manufacturing International Corporation (SMIC)’s 65-nm process. The results show that the overall efficiency (relative area×relative latency) of our HERRU is higher by at least 23% than that of other designs with similar functions. When executing the bi-directional rotation operations alone, HERRU occupies a significantly smaller area with a lower latency than previously proposed designs.

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