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Abstract: A wide-range tracking technique for clock and data recovery (CDR) circuit is presented. Compared to the traditional technique, a digital CDR controller with calibration is adopted to extend the tracking range. Because of the use of digital circuits in the design, CDR is not sensitive to process and power supply variations. To verify the technique, the whole CDR circuit is implemented using 65-nm CMOS technology. Measurements show that the tracking range of CDR is greater than ±6×10⁻³ at 5 Gb/s. The receiver has good jitter tolerance performance and achieves a bit error rate of <10^–12. The re-timed and re-multiplexed serial data has a root-mean-square jitter of 6.7 ps.

The manuscript proposed a wide range tracking technique for clock data recovery (CDR) circuit. Due to digital CDR controller with calibration, the tracking range was extended. Moreover, the testing results have verified the design technology. This paper is well structured and the presentation is clear.

一种针对工艺变化鲁棒性时钟数据恢复应用的宽范围追踪技术

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