CLC number: TN4
On-line Access: 2024-08-27
Received: 2023-10-17
Revision Accepted: 2024-05-08
Crosschecked: 2016-10-17
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De-xuan Zou, Gai-ge Wang, Gai Pan, Hong-wei Qi. A modified simulated annealing algorithm and an excessive area model for floorplanning using fixed-outline constraints[J]. Frontiers of Information Technology & Electronic Engineering, 2016, 17(11): 1228-1244.
@article{title="A modified simulated annealing algorithm and an excessive area model for floorplanning using fixed-outline constraints",
author="De-xuan Zou, Gai-ge Wang, Gai Pan, Hong-wei Qi",
journal="Frontiers of Information Technology & Electronic Engineering",
volume="17",
number="11",
pages="1228-1244",
year="2016",
publisher="Zhejiang University Press & Springer",
doi="10.1631/FITEE.1500386"
}
%0 Journal Article
%T A modified simulated annealing algorithm and an excessive area model for floorplanning using fixed-outline constraints
%A De-xuan Zou
%A Gai-ge Wang
%A Gai Pan
%A Hong-wei Qi
%J Frontiers of Information Technology & Electronic Engineering
%V 17
%N 11
%P 1228-1244
%@ 2095-9184
%D 2016
%I Zhejiang University Press & Springer
%DOI 10.1631/FITEE.1500386
TY - JOUR
T1 - A modified simulated annealing algorithm and an excessive area model for floorplanning using fixed-outline constraints
A1 - De-xuan Zou
A1 - Gai-ge Wang
A1 - Gai Pan
A1 - Hong-wei Qi
J0 - Frontiers of Information Technology & Electronic Engineering
VL - 17
IS - 11
SP - 1228
EP - 1244
%@ 2095-9184
Y1 - 2016
PB - Zhejiang University Press & Springer
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DOI - 10.1631/FITEE.1500386
Abstract: Outline-free floorplanning focuses on area and wirelength reductions, which are usually meaningless, since they can hardly satisfy modern design requirements. We concentrate on a more difficult and useful issue, fixed-outline floorplanning. This issue imposes fixed-outline constraints on the outline-free floorplanning, making the physical design more interesting and challenging. The contributions of this paper are primarily twofold. First, a modified simulated annealing (MSA) algorithm is proposed. In the beginning of the evolutionary process, a new attenuation formula is used to decrease the temperature slowly, to enhance MSA’s global searching capacity. After a period of time, the traditional attenuation formula is employed to decrease the temperature rapidly, to maintain MSA’s local searching capacity. Second, an excessive area model is designed to guide MSA to find feasible solutions readily. This can save much time for refining feasible solutions. Additionally, b*-tree representation is known as a very useful method for characterizing floorplanning. Therefore, it is employed to perform a perturbing operation for MSA. Finally, six groups of benchmark instances with different dead spaces and aspect ratios—circuits n10, n30, n50, n100, n200, and n300—are chosen to demonstrate the efficiency of our proposed method on fixed-outline floorplanning. Compared to several existing methods, the proposed method is more efficient in obtaining desirable objective function values associated with the chip area, wirelength, and fixed-outline constraints.
In this paper, a simulated annealing algorithm and excessive area model are developed for the floorplanning problem. The literature review and problem statement are acceptable. The paper is organized in an understandable manner. Simulated annealing process is one of the many other heuristics methods and the authors propose the SA modification as the originality of the work. Excessive area model is also included. They have used six combinations to evaluate the performance of the proposed approaches. They have choosen the methods that returned best results for each combination.
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