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Journal of Zhejiang University SCIENCE A 2007 Vol.8 No.1 P.50-55

http://doi.org/10.1631/jzus.2007.A0050


A novel low-voltage high precision current reference based on subthreshold MOSFETs


Author(s):  YU Guo-yi, ZOU Xue-cheng

Affiliation(s):  Department of Electronic Science & Technology, Huazhong University of Science and Technology, Wuhan 430074, China

Corresponding email(s):   ymancheng@yahoo.com.cn

Key Words:  Current reference, Curvature-compensation, Low voltage, Subthreshold, CMOS integrated circuit


YU Guo-yi, ZOU Xue-cheng. A novel low-voltage high precision current reference based on subthreshold MOSFETs[J]. Journal of Zhejiang University Science A, 2007, 8(1): 50-55.

@article{title="A novel low-voltage high precision current reference based on subthreshold MOSFETs",
author="YU Guo-yi, ZOU Xue-cheng",
journal="Journal of Zhejiang University Science A",
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pages="50-55",
year="2007",
publisher="Zhejiang University Press & Springer",
doi="10.1631/jzus.2007.A0050"
}

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%T A novel low-voltage high precision current reference based on subthreshold MOSFETs
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%A ZOU Xue-cheng
%J Journal of Zhejiang University SCIENCE A
%V 8
%N 1
%P 50-55
%@ 1673-565X
%D 2007
%I Zhejiang University Press & Springer
%DOI 10.1631/jzus.2007.A0050

TY - JOUR
T1 - A novel low-voltage high precision current reference based on subthreshold MOSFETs
A1 - YU Guo-yi
A1 - ZOU Xue-cheng
J0 - Journal of Zhejiang University Science A
VL - 8
IS - 1
SP - 50
EP - 55
%@ 1673-565X
Y1 - 2007
PB - Zhejiang University Press & Springer
ER -
DOI - 10.1631/jzus.2007.A0050


Abstract: 
A novel topology low-voltage high precision current reference based on subthreshold Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) is presented. The circuit achieves a temperature-independent reference current by a proper combination current of two first-order temperature-compensation current references, which exploit the temperature characteristics of integrated poly2 resistors and the I-V transconductance characteristics of MOSFET operating in the subthreshold region. The circuit, designed with the 1st silicon 0.35 µm standard CMOS logic process technology, exhibits a stable current of about 2.25 µA with much low temperature coefficient of 3×10−4 µA/°C in the temperature range of −40~150 °C at 1 V supply voltage, and also achieves a better power supply rejection ratio (PSRR) over a broad frequency. The PSRR is about −78 dB at DC and remains −42 dB at the frequency higher than 10 MHz. The maximal process error is about 6.7% based on the Monte Carlo simulation. So it has good process compatibility.

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Reference

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