Affiliation(s): 1Information Engineering University, Zhengzhou 450001, China
2Institute of Big Data, Fudan University, Shanghai 200433, China
3National Digital Switching System Engineering & Technology Research Center, Zhengzhou 450002, China
Ping LV1, Qin-rang LIU2, Jiangxing WU3, Jianliang SHEN1, Mengke LIAN1, Rui CAO1, Shuai WEI1, Zhichao LI1,Peijie LI1, Wei GUO1, Wenjian ZHANG1, Hong YU1, Yan ZHAO1. From software-defined interconnect to software-defined system-on-wafer: a computing architecture revolution in the post-Moore era[J]. Journal of Zhejiang University Science ,in press.Frontiers of Information Technology & Electronic Engineering,in press.https://doi.org/10.1631/ENG.ITEE.2025.0063
@article{title="From software-defined interconnect to software-defined system-on-wafer: a computing architecture revolution in the post-Moore era", author="Ping LV1, Qin-rang LIU2, Jiangxing WU3, Jianliang SHEN1, Mengke LIAN1, Rui CAO1, Shuai WEI1, Zhichao LI1,Peijie LI1, Wei GUO1, Wenjian ZHANG1, Hong YU1, Yan ZHAO1", journal="Journal of Zhejiang University Science ", year="in press", publisher="Zhejiang University Press & Springer", doi="https://doi.org/10.1631/ENG.ITEE.2025.0063" }
%0 Journal Article %T From software-defined interconnect to software-defined system-on-wafer: a computing architecture revolution in the post-Moore era %A Ping LV1 %A Qin-rang LIU2 %A Jiangxing WU3 %A Jianliang SHEN1 %A Mengke LIAN1 %A Rui CAO1 %A Shuai WEI1 %A Zhichao LI1 %A Peijie LI1 %A Wei GUO1 %A Wenjian ZHANG1 %A Hong YU1 %A Yan ZHAO1 %J Journal of Zhejiang University SCIENCE %P %@ 2095-9184 %D in press %I Zhejiang University Press & Springer doi="https://doi.org/10.1631/ENG.ITEE.2025.0063"
TY - JOUR T1 - From software-defined interconnect to software-defined system-on-wafer: a computing architecture revolution in the post-Moore era A1 - Ping LV1 A1 - Qin-rang LIU2 A1 - Jiangxing WU3 A1 - Jianliang SHEN1 A1 - Mengke LIAN1 A1 - Rui CAO1 A1 - Shuai WEI1 A1 - Zhichao LI1 A1 - Peijie LI1 A1 - Wei GUO1 A1 - Wenjian ZHANG1 A1 - Hong YU1 A1 - Yan ZHAO1 J0 - Journal of Zhejiang University Science SP - EP - %@ 2095-9184 Y1 - in press PB - Zhejiang University Press & Springer ER - doi="https://doi.org/10.1631/ENG.ITEE.2025.0063"
Abstract: As Moore's Law approaches its fundamental physical and economic limits, the semiconductor industry faces unprecedented challenges in maintaining performance growth. This study presents the revolutionary evolution from software-defined interconnect (SDI) to software-defined system-on-wafer (SDSoW), a paradigm-shifting architectural approach that transcends traditional scaling constraints through wafer-level heterogeneous integration. Our proposed SDSoW enables dynamic reconfiguration of thousands of computing chiplets across an entire wafer, achieving superlinear performance scaling and significantly improving energy efficiency. We established a comprehensive theoretical framework with mathematical models covering key aspects, such as interconnect flexibility and integration scaling, and proposed an application-driven dynamic architecture reconfiguration (ADR) paradigm that optimizes wafer-scale resources in real time and may foster emergent intelligence in large, heterogeneous systems. Simulation results (128-1024 nodes) demonstrate that SDSoW outperforms conventional multi-chip systems, delivering 3.5× higher throughput, 80% lower latency, and 2.5× better energy efficiency. As a paradigm shift comparable to the invention of integrated circuits (ICs), it provides a viable pathway beyond Moore's Law through innovative architectural design rather than process scaling.
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