Full Text:  <186>

Summary:  <11>

CLC number: TN722.1

On-line Access: 2025-07-02

Received: 2024-10-14

Revision Accepted: 2025-07-02

Crosschecked: 2025-02-10

Cited: 0

Clicked: 268

Citations:  Bibtex RefMan EndNote GB/T7714

 ORCID:

Yi ZHANG

https://orcid.org/0009-0008-7050-9618

Jingzhou PANG

https://orcid.org/0000-0003-3781-3219

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Frontiers of Information Technology & Electronic Engineering 

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One-dimensional reconfigurable three-stage Doherty power amplifier with load mismatch resilience


Author(s):  Yi ZHANG, Ruibin GAO, Shuang LIU, Yujie HAN, Meng REN, Hanhui LIN, Jingzhou PANG

Affiliation(s):  School of Microelectronics and Communication Engineering, Chongqing University, Chongqing 400044, China

Corresponding email(s):  jingzhou.pang@cqu.edu.cn

Key Words:  Doherty power amplifier; Load mismatch; One-dimensional (1D) control; Reconfigurable; Three-stage


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Yi ZHANG, Ruibin GAO, Shuang LIU, Yujie HAN, Meng REN, Hanhui LIN, Jingzhou PANG. One-dimensional reconfigurable three-stage Doherty power amplifier with load mismatch resilience[J]. Frontiers of Information Technology & Electronic Engineering,in press.https://doi.org/10.1631/FITEE.2400913

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journal="Frontiers of Information Technology & Electronic Engineering",
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doi="https://doi.org/10.1631/FITEE.2400913"
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%A Hanhui LIN
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A1 - Meng REN
A1 - Hanhui LIN
A1 - Jingzhou PANG
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Abstract: 
This article presents a comprehensive theoretical analysis of the resilience demonstrated by the three-stage Doherty power amplifier (DPA) when operating under load mismatch conditions. Additionally, a novel reconfigurable three-stage DPA architecture is introduced, with the aim of enhancing resilience to load mismatch using exceptionally simple circuits and a one-dimensional (1D) control method. To validate the efficacy of this proposed architecture and control approach, a DPA prototype employing commercial gallium nitride (GaN) active devices has been designed and meticulously fabricated at 2 GHz. With a matched 50 Ω load, the fabricated three-stage DPA achieves a high-efficiency range of 9.5 dB with larger than 51% back-off drain efficiency (DE). Through the proposed 1D control, the DPA presents 47.0%–55.1% back-off efficiency with ≤ 2 dB power fluctuation at a 2:1 voltage standing wave ratio (VSWR) over a 360° phase span. When driven by a 20 MHz long-term evolution (LTE) signal with an 8 dB peak-to-average power ratio (PAPR), the DPA achieves 46.2%–53.9% average efficiency and better than -21 dBc adjacent channel power ratio (ACPR) without digital pre-distortion (DPD) under load mismatch conditions.

抗负载失配的一维可重构三阶Doherty功率放大器

张艺,高瑞彬,刘爽,韩玉杰,任梦,林涵辉,庞竞舟
重庆大学微电子与通信工程学院,中国重庆市,400044
摘要:本文对三阶Doherty功率放大器(DPA)在负载失配条件下的抗失配能力进行了全面的理论分析。此外,提出一种新型可重构三阶DPA架构,旨在通过使用极其简单的电路和一维控制方法来增强对负载失配的耐受性。为了验证所提架构和控制方法的有效性,设计并制作了一个采用商用氮化镓有源器件的DPA原型,其工作频率为2 GHz。在匹配的50 Ω负载下,制作的三阶DPA实现了9.5 dB的高效率范围,回退漏极效率超过51%。通过所提出的一维控制方法,该DPA在2:1电压驻波比下,在360°相位范围内,回退效率达到47.0%~55.1%,功率波动小于2 dB。当使用8 dB峰均功率比的20 MHz长期演进信号驱动时,DPA在负载失配条件下,无需数字预失真,即可实现46.2%~53.9%的平均效率,且邻信道功率比优于−21 dBc。

关键词组:Doherty功率放大器;负载失配;一维控制;可重构;三阶

Darkslateblue:Affiliate; Royal Blue:Author; Turquoise:Article

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