Similar articles

Abstract: Manufacturing and integration of micro-electro-mechanical systems (MEMS) devices and integrated circuits (ICs) by wafer bonding often generate problems caused by thermal properties of materials. This paper presents a low temperature wafer direct bonding process assisted by O₂ plasma. Silicon wafers were treated with wet chemical cleaning and subsequently activated by O₂ plasma in the etch element of a sputtering system. Then, two wafers were brought into contact in the bonder followed by annealing in N₂ atmosphere for several hours. An infrared imaging system was used to detect bonding defects and a razor blade test was carried out to determine surface energy. The bonding yield reaches 90%–95% and the achieved surface energy is 1.76 J/m² when the bonded wafers are annealed at 350 °C in N₂ atmosphere for 2 h. void formation was systematically observed and elimination methods were proposed. The size and density of voids greatly depend on the annealing temperature. Short O₂ plasma treatment for 60 s can alleviate void formation and enhance surface energy. A pulling test reveals that the bonding strength is more than 11.0 MPa. This low temperature wafer direct bonding process provides an efficient and reliable method for 3D integration, system on chip, and MEMS packaging.

[1]Christiansen, S.H., Singh, R., Gösele, U., 2006. Wafer direct bonding: from advanced substrate engineering to future applications in micro/nanoelectronics. Proc. IEEE, 94(12):2060-2106.

[2]Dunare, C., Cernica, I., Popescu, D., Popescu, A., Cristea, D., Modreanu, M., Manea, E., 2000. SOI Materials for MOEMS Obtained by Silicon Direct Bondig Technique. Proc. Int. Semiconductor Conf., p.531-534.

[3]Eichler, M., Michel, B., Thomas, M., Gabriel, M., Klages, C.P., 2008. Atmospheric-pressure plasma pretreatment for direct bonding of silicon wafers at low temperatures. Surf. Coat. Technol., 203(5-7):826-829.

[4]Gösele, U., Tong, Q.Y., 1998. Semiconductor wafer bonding. Ann. Rev. Mater. Sci., 28(1):215-241.

[5]Howlader, M.M.R., Zhang, F., 2010. Void-free strong bonding of surface activated silicon wafers from room temperature to annealing at 600 °C. Thin Sol. Films, 519(2):804-808.

[6]Huang, Y., Ergun, A.S., Hæggström, E., Badi, M.H., Khuri-Yakub, B.T., 2003. Fabricating capacitive micromachined ultrasonic transducers with wafer-bonding technology. J. Microelectromech. Syst., 12(2):128-137.

[7]Ko, C.T., Chen, K.N., 2010. Wafer-level bonding/stacking technology for 3D integration. Microelectron. Rel., 50(4):481-488.

[8]Kondou, R., Wang, C.X., Shigetou, A., Suga, T., 2012. Nanoadhesion layer for enhanced Si-Si and Si-SiN wafer bonding. Microelectron. Rel., 52(2):342-346.

[9]Kowal, J., Nixon, T., Aitken, N., 2009. Surface activation for low temperature wafer fusion bonding by radicals produced in an oxygen discharge. Sens. Actuat. A, 155(1):145-151.

[10]Lai, S.I., Lin, H.Y., Hu, C.T., 2004. Effect of surface treatment on wafer direct bonding process. Mater. Chem. Phys., 83(2-3):265-272.

[11]Lin, X.H., Shi, T.L., Liao, G.L., Tang, Z.R., Liu, S.Y., Nie, L., 2007. UV Enhanced Low Temperature Wafer Direct Bonding and Interface Quality Test. Proc. 7th IEEE Int. Conf. on Nanotechnology, p.754-758.

[12]Pasquariello, D., Camacho, M., Hjort, K., Dózsa, L., Szentpáli, B., 2001. Evaluation of InP-to-silicon heterobonding. Mater. Sci. Eng. B, 80(1-3):134-137.

[13]Plach, T., Hingerl, K., Dragoi, V., Wimplinger, M., 2012. Low Temperature Plasma Activated Direct Wafer Bonding. 3rd IEEE Int. Workshop on Low Temperature Bonding for 3D Integration, p.145.

[14]Plößl, A., Kräuter, G., 1999. Wafer direct bonding: tailoring adhesion between brittle materials. Mater. Sci. Eng. R, 25(1-2):1-88.

[15]Reiche, M., 2006. Semiconductor wafer bonding. Phys. Stat. Sol. A, 203(4):747-759.

[16]Schmidt, M.A., 1998. Wafer-to-wafer bonding for microstructure formation. Proc. IEEE, 86(8):1575-1585.

[17]Seok, S., Rolland, N., Rolland, P.A., 2008. A novel packaging method using wafer-level BCB polymer bonding and glass wet-etching for RF applications. Sens. Actuat. A, 147(2):677-682.

[18]Sohn, Y.C., Wang, Q., Ham, S.J., Jeong, B.G., Jung, K.D., Choi, M.S., Kim, W.B., Moon, C.Y., 2007. Wafer-Level Low Temperature Bonding with Au-In System. Proc. 57th Electronic Components and Technology Conf., p.633-637.

[19]Suga, T., Kim, T.H., Howlader, M.M.R., 2004. Combined Process for Wafer Direct Bonding by Means of the Surface Activation Method. Proc. 54th Electronic Components and Technology Conf., p.484-490.

[20]Taniyama, S., Wang, Y.H., Fujino, M., Suga, T., 2008. Room Temperature Wafer Bonding Using Surface Activated Bonding Method. IEEE 9th VLSI Packaging Workshop in Japan, p.141-144.

[21]Tsau, C.H., Spearing, S.M., Schmidt, M.A., 2004. Wafer-level thermocompression bonds. J. Microelectromech. Syst., 13(6):963-971.

[22]Wang, C.X., Higurashi, E., Suga, T., 2007. Room Temperature Si/Si Wafer Direct Bonding in Air. 8th Int. Conf. on Electronic Packaging Technology, p.1-6.

[23]Zhang, X.X., Raskin, J.P., 2005. Low-temperature wafer bonding: a study of void formation and influence on bonding strength. J. Microelectromech. Syst., 14(2):368-382.

[24]Zhao, Y.L., Song, Z.J., Li, Y., 2012. Low Temperature Wafer Direct Bonding Using Wet Chemical Treatment. 3rd Int. Conf. on Manufacturing Science and Engineering, p.2381-2384.