CLC number: TN47
On-line Access: 2024-08-27
Received: 2023-10-17
Revision Accepted: 2024-05-08
Crosschecked: 2017-10-31
Cited: 0
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Mao-qun Yao, Kai Yang, Ji-zhong Shen, Cong-yuan Xu. Function synthesis algorithm based on RTD-based three-variable universal logic gates[J]. Frontiers of Information Technology & Electronic Engineering, 2017, 18(10): 1654-1664.
@article{title="Function synthesis algorithm based on RTD-based three-variable universal logic gates",
author="Mao-qun Yao, Kai Yang, Ji-zhong Shen, Cong-yuan Xu",
journal="Frontiers of Information Technology & Electronic Engineering",
volume="18",
number="10",
pages="1654-1664",
year="2017",
publisher="Zhejiang University Press & Springer",
doi="10.1631/FITEE.1601730"
}
%0 Journal Article
%T Function synthesis algorithm based on RTD-based three-variable universal logic gates
%A Mao-qun Yao
%A Kai Yang
%A Ji-zhong Shen
%A Cong-yuan Xu
%J Frontiers of Information Technology & Electronic Engineering
%V 18
%N 10
%P 1654-1664
%@ 2095-9184
%D 2017
%I Zhejiang University Press & Springer
%DOI 10.1631/FITEE.1601730
TY - JOUR
T1 - Function synthesis algorithm based on RTD-based three-variable universal logic gates
A1 - Mao-qun Yao
A1 - Kai Yang
A1 - Ji-zhong Shen
A1 - Cong-yuan Xu
J0 - Frontiers of Information Technology & Electronic Engineering
VL - 18
IS - 10
SP - 1654
EP - 1664
%@ 2095-9184
Y1 - 2017
PB - Zhejiang University Press & Springer
ER -
DOI - 10.1631/FITEE.1601730
Abstract: Compared with complementary metal–oxide semiconductor (), the resonant tunneling device (RTD) has better performances; it is the most promising candidate for next-generation integrated circuit devices. The universal logic gate is an important unit circuit because of its powerful logic function, but there are few function synthesis algorithms that can implement an n-variable logical function by RTD-based universal logic gates. In this paper, we propose a new concept, i.e., the truth value matrix. With it a novel disjunctive decomposition algorithm can be used to decompose an arbitrary n-variable logical function into three-variable subset functions. On this basis, a novel function synthesis algorithm is proposed, which can implement arbitrary n-variable logical functions by RTD-based universal threshold logic gates (UTLGs), RTD-based three-variable XOR gates (XOR3s), and RTD-based three-variable universal logic gate (ULG3s). When this proposed function synthesis algorithm is used to implement an n-variable logical function, if the function is a directly disjunctive decomposition one, the circuit structure will be very simple, and if the function is a non-directly disjunctive decomposition one, the circuit structure will be simpler than when using only UTLGs or ULG3s. The proposed function synthesis algorithm is straightforward to program, and with this algorithm it is convenient to implement an arbitrary n-variable logical function by RTD-based universal logic gates.
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