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| 1 | Two-step gate-recess process combining selective wet-etching and digital wet-etching for InAlAs/InGaAs InP-... Author(s):Ying-hui Zhong, Shu-xiang Sun, Wen... Clicked:8373 Download:4269 Cited:0 <Full Text> <PPT> 2734 Frontiers of Information Technology & Electronic Engineering 2017 Vol.18 No.8 P.1180-1185 DOI:10.1631/FITEE.1601121 |
| 2 | Iris: a multi-constraint graphic layout generation system Author(s):Liuqing CHEN, Qianzhi JING, Yixin ... Clicked:3610 Download:3943 Cited:0 <Full Text> <PPT> 839 Frontiers of Information Technology & Electronic Engineering 2024 Vol.25 No.7 P.968-987 DOI:10.1631/FITEE.2300312 |