Full Text:   <2912>

Summary:  <2049>

CLC number: TN47

On-line Access: 2024-08-27

Received: 2023-10-17

Revision Accepted: 2024-05-08

Crosschecked: 2015-07-24

Cited: 1

Clicked: 8042

Citations:  Bibtex RefMan EndNote GB/T7714

 ORCID:

Mao-qun Yao

http://orcid.org/0000-0001-6484-4972

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Frontiers of Information Technology & Electronic Engineering  2015 Vol.16 No.8 P.694-699

http://doi.org/10.1631/FITEE.1500102


Design of a novel RTD-based three-variable universal logic gate


Author(s):  Mao-qun Yao, Kai Yang, Cong-yuan Xu, Ji-zhong Shen

Affiliation(s):  1Hangzhou Institute of Service Engineering, Hangzhou Normal University, Hangzhou 311121, China; more

Corresponding email(s):   yaomaoqun@163.com

Key Words:  Resonant tunneling diode (RTD), Threshold logic gate, Reed-Muller expansion, Universal logic gate



Abstract: 
Traditional CMOS technology faces some fundamental physical limitations. Therefore, it has become very important for the integrated circuit industry to continue to develop modern devices and new design methods. The threshold logic gate has attracted much attention because of its powerful logic function. The resonant tunneling diode (RTD) is well suited for implementing the threshold logic gate because of its high-speed switching capability, negative differential resistance (NDR) characteristic, and functional versatility. In this paper, based on the Reed-Muller (RM) algebraic system, a novel method is proposed to convert three-variable non-threshold functions to the XOR of multiple threshold functions, which is simple and has a programmable implementation. With this approach, all three-variable non-threshold functions can be presented by the XOR of two threshold functions, except for two special functions. On this basis, a novel three-variable universal logic gate (ULG3) is proposed, composed of two RTD-based universal threshold logic gates (UTLG) and an RTD-based three-variable XOR gate (XOR3). The ULG3 has a simple structure, and a simple method is presented to implement all three-variable functions using one ULG3. Thus, the proposed ULG3 provides a new efficient universal logic gate to implement RTD-based arbitrary n-variable functions.

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