Full Text:   <2037>

Summary:  <342>

CLC number: 

On-line Access: 2022-01-24

Received: 2020-07-06

Revision Accepted: 2022-04-22

Crosschecked: 2020-12-22

Cited: 0

Clicked: 3338

Citations:  Bibtex RefMan EndNote GB/T7714

 ORCID:

Mengni BIE

https://orcid.org/0000-0003-2446-6692

Wei LI

https://orcid.org/0000-0002-6597-0142

-   Go to

Article info.
Open peer comments

Frontiers of Information Technology & Electronic Engineering  2022 Vol.23 No.1 P.134-144

http://doi.org/10.1631/FITEE.2000325


An energy-efficient reconfigurable asymmetric modular cryptographic operation unit for RSA and ECC


Author(s):  Mengni BIE, Wei LI, Tao CHEN, Longmei NAN, Danyang YANG

Affiliation(s):  Information Engineering University, Zhengzhou 450001, China; more

Corresponding email(s):   raspberry0213@126.com, liwei12@fudan.edu.cn

Key Words:  Modular operation unit, Reconfigurable, High energy efficiency


Mengni BIE, Wei LI, Tao CHEN, Longmei NAN, Danyang YANG. An energy-efficient reconfigurable asymmetric modular cryptographic operation unit for RSA and ECC[J]. Frontiers of Information Technology & Electronic Engineering, 2022, 23(1): 134-144.

@article{title="An energy-efficient reconfigurable asymmetric modular cryptographic operation unit for RSA and ECC",
author="Mengni BIE, Wei LI, Tao CHEN, Longmei NAN, Danyang YANG",
journal="Frontiers of Information Technology & Electronic Engineering",
volume="23",
number="1",
pages="134-144",
year="2022",
publisher="Zhejiang University Press & Springer",
doi="10.1631/FITEE.2000325"
}

%0 Journal Article
%T An energy-efficient reconfigurable asymmetric modular cryptographic operation unit for RSA and ECC
%A Mengni BIE
%A Wei LI
%A Tao CHEN
%A Longmei NAN
%A Danyang YANG
%J Frontiers of Information Technology & Electronic Engineering
%V 23
%N 1
%P 134-144
%@ 2095-9184
%D 2022
%I Zhejiang University Press & Springer
%DOI 10.1631/FITEE.2000325

TY - JOUR
T1 - An energy-efficient reconfigurable asymmetric modular cryptographic operation unit for RSA and ECC
A1 - Mengni BIE
A1 - Wei LI
A1 - Tao CHEN
A1 - Longmei NAN
A1 - Danyang YANG
J0 - Frontiers of Information Technology & Electronic Engineering
VL - 23
IS - 1
SP - 134
EP - 144
%@ 2095-9184
Y1 - 2022
PB - Zhejiang University Press & Springer
ER -
DOI - 10.1631/FITEE.2000325


Abstract: 
RSA and ellipse curve cryptography (ECC) algorithms are widely used in authentication, data security, and access control. In this paper, we analyze the basic operation of the ECC and RSA algorithms and optimize their modular multiplication and modular inversion algorithms. We then propose a reconfigurable modular operation architecture, with a mix-memory unit and double multiply-accumulate structures, to realize our unified, asymmetric cryptosystem structure in an operational unit. Synthesized with 55-nm CMOS process, our design runs at 588 MHz and requires only 437 801 μm2 of hardware resources. Our proposed design takes 21.92 and 23.36 mW for 2048-bit RSA modular multiplication and modular inversion respectively, as well as 16.16 and 15.88 mW to complete 512-bit ECC dual-field modular multiplication and modular inversion respectively. It is more energy-efficient and flexible than existing single algorithm units. Compared with existing multiple algorithm units, our proposed method shows better performance. The operation unit is embedded in a 64-bit RISC-V processor, realizing key generation, encryption and decryption, and digital signature functions of both RSA and ECC. Our proposed design takes 0.224 and 0.153 ms for 256-bit ECC point multiplication in G(p) and G(2m) respectively, as well as 0.96 ms to complete 1024-bit RSA exponentiation, meeting the demand for high energy efficiency.

一种用于RSA和ECC的高能效可重构非对称密码模运算单元

别梦妮1,李伟1,陈韬1,南龙梅2,杨丹阳1
1信息工程大学,中国郑州市,450001
2复旦大学专用集成电路与系统国家重点实验室,中国上海市,200000
摘要:RSA和椭圆曲线密码(ECC)算法广泛应用于身份验证、数据安全和访问控制。本文分析了ECC和RSA算法基本操作并对模乘和模逆算法进行优化。提出一个具有混合内存单元和双乘加结构的可重构模运算单元,实现了非对称密码算法在运算单元层次的统一。采用55 nm CMOS标准工艺对模运算单元进行综合,该单元占用硬件资源437 801µm2,最高时钟频率可达588 MHz。所提模运算单元完成2048位RSA模乘和模逆功耗分别为21.92和23.36 mW,完成512位ECC双域模乘和模逆功耗分别为16.16和15.88 mW。它比现有单一算法单元更高效、更灵活。与现有多算法单元相比,所提单元表现出更好性能。将所提模运算单元嵌入64位RISC-V处理器,可实现RSA和ECC的密钥生成、加解密以及数字签名功能。实验结果表明,所提设计在G(p)和G(2m)上实现256位ECC点乘分别需要0.224和0.153 ms,实现1024位RSA求幂需要0.96 ms,满足高能效需求。

关键词:模运算单元;可重构;高能效

Darkslateblue:Affiliate; Royal Blue:Author; Turquoise:Article

Reference

[1]5G Infrastructure Public Private Partnership (5G PPP), 2016. View on 5G Architecture. White Paper. https://5g-ppp.eu/

[2]Chen GH, Zhu JM, Liu M, et al., 2010. Dual-field modular multiplication algorithm and modular inversion algorithm with VLSI implementation. J Electron Inform Technol, 32(9):2095-2100 (in Chinese). doi: 10.3724/SP.J.1146.2009.01258

[3]Chen HM, Li Z, Xie TD, 2012. Optimal design of multiplier based on Radix-4 Booth encoding. Comput Eng, 38(1):233-235 (in Chinese). doi: 10.3969/j.issn.1000-3428.2012.01.076

[4]Choi P, Lee MK, Kim JH, et al., 2018. Low-complexity elliptic curve cryptography processor based on configurable partial modular reduction over NIST prime fields. IEEE Trans Circ Syst II, 65(11):1703-1707. doi: 10.1109/TCSII.2017.2756680

[5]Ding JN, Li SG, Gu Z, 2019. High-speed ECC processor over NIST prime fields applied with Toom–Cook multiplication. IEEE Trans Circ Syst I, 66(3):1003-1016. doi: 10.1109/TCSI.2018.2878598

[6]GSMA Intelligence, 2014. Understanding 5G: Perspectives on Future Technological Advancements in Mobile. White Paper. https://www.gsma.com/

[7]Gu Z, Li SG, 2019. A division-free Toom–Cook multiplication-based Montgomery modular multiplication. IEEE Trans Circ Syst II, 66(8):1401-1405. doi: 10.1109/TCSII.2018.2886962

[8]Ibrahim A, Gebali F, 2017. Scalable and unified digit-serial processor array architecture for multiplication and inversion over GF(2m). IEEE Trans Circ Syst I, 64(11):2894-2906. doi: 10.1109/TCSI.2017.2691353

[9]Kaya Koc C, Acar T, Kaliski BS, 1996. Analyzing and comparing Montgomery multiplication algorithms. IEEE Micro, 16(3):26-33. doi: 10.1109/40.502403

[10]Kuang SR, Wang JP, Chang KC, et al., 2013. Energy-efficient high-throughput Montgomery modular multipliers for RSA cryptosystems. IEEE Trans Very Large Scale Integr Syst, 21(11):1999-2009. doi: 10.1109/TVLSI.2012.2227846

[11]Kuang SR, Wu KY, Lu RY, 2016. Low-cost high-performance VLSI architecture for Montgomery modular multiplication. IEEE Trans Very Large Scale Integr Syst, 24(2):434-443. doi: 10.1109/TVLSI.2015.2409113

[12]Lee JW, Chung SC, Chang HC, et al., 2014. Efficient power-analysis-resistant dual-field elliptic curve cryptographic processor using heterogeneous dual-processing-element architecture. IEEE Trans Very Large Scale Integr Syst, 22(1):49-61. doi: 10.1109/TVLSI.2013.2237930

[13]Li B, Lei BJ, Zhang YL, et al., 2019. A novel and high-performance modular square scheme for elliptic curve cryptography over GF(p). IEEE Trans Circ Syst II, 66(4):647-651. doi: 10.1109/TCSII.2018.2867618

[14]Liu ZL, Liu DS, Zou XC, 2017. An efficient and flexible hardware implementation of the dual-field elliptic curve cryptographic processor. IEEE Trans Ind Electron, 64(3):2353-2362. doi: 10.1109/TIE.2016.2625241

[15]Miyamoto A, Homma N, Aoki T, et al., 2011. Systematic design of RSA processors based on high-radix Montgomery multipliers. IEEE Trans Very Large Scale Integr Syst, 19(7):1136-1146. doi: 10.1109/TVLSI.2010.2049037

[16]Next Generation Mobile Networks (NGMN), 2015. NGMN 5G. White Paper. https://www.ngmn.org/

[17]Xia JF, 2016. Design of RSA Key Pair Accelerating Circuit for Smart Card. MS Thesis, Huazhong University of Science and Technology, Wuhan, China (in Chinese).

Open peer comments: Debate/Discuss/Question/Opinion

<1>

Please provide your name, email address and a comment





Journal of Zhejiang University-SCIENCE, 38 Zheda Road, Hangzhou 310027, China
Tel: +86-571-87952783; E-mail: cjzhang@zju.edu.cn
Copyright © 2000 - 2022 Journal of Zhejiang University-SCIENCE