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A spaceborne advanced storage system for remote sensing microsatellites
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Shilei TU, Huiquan WANG, Yue HUANG, Zhonghe JIN. A spaceborne advanced storage system for remote sensing microsatellites[J]. Frontiers of Information Technology & Electronic Engineering, 1998, -1(-1): .
@article{title="A spaceborne advanced storage system for remote sensing microsatellites",
author="Shilei TU, Huiquan WANG, Yue HUANG, Zhonghe JIN",
journal="Frontiers of Information Technology & Electronic Engineering",
volume="-1",
number="-1",
pages="",
year="1998",
publisher="Zhejiang University Press & Springer",
doi="10.1631/FITEE.2200445"
}
%0 Journal Article
%T A spaceborne advanced storage system for remote sensing microsatellites
%A Shilei TU
%A Huiquan WANG
%A Yue HUANG
%A Zhonghe JIN
%J Journal of Zhejiang University SCIENCE C
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%@ 2095-9184
%D 1998
%I Zhejiang University Press & Springer
%DOI 10.1631/FITEE.2200445
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T1 - A spaceborne advanced storage system for remote sensing microsatellites
A1 - Shilei TU
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J0 - Journal of Zhejiang University Science C
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PB - Zhejiang University Press & Springer
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DOI - 10.1631/FITEE.2200445
Abstract: With the development of satellite miniaturization and remote sensing, the establishment of microsatellite constellations is an inevitable trend. Due to their limited size, weight, and power (SWaP), spaceborne storage systems with excellent scalability, performance and reliability are still one of the technical bottlenecks of remote sensing microsatellites. Based on the commercial off-the-shelf (COTS) field-programmable gate array (FPGA) and memory devices, a spaceborne advanced storage system (SASS) is proposed in this paper. This work provides a dynamic programming, queue scheduling MIMO cache technique and a high-speed, high-reliability NAND Flash controller for multiple microsatellite payload data. Experimental results show that SASS has outstanding scalability with a maximum write rate of 2429 Mbps and preserves at least 78.53% of the performance when a single NAND Flash fails. The scheduling techniques effectively shorten the data scheduling time, and the data remapping method of the NAND Flash controller reduces the bit error rate (BER) by at least 37.8%.
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