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index	Title
1	Power-efficient dual-edge implicit pulse-triggered flip-flop with an embedded clock-gating scheme Author(s):Liang Geng , Ji-Zhong Shen , Cong-...  Clicked:6025  Download:2720  Cited:0  <Full Text>  <PPT> 1874 Frontiers of Information Technology & Electronic Engineering  2016 Vol.17 No.9 P.962-972  DOI:10.1631/FITEE.1500293

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