CLC number: TP333
On-line Access: 2024-08-27
Received: 2023-10-17
Revision Accepted: 2024-05-08
Crosschecked: 2021-10-07
Cited: 0
Clicked: 4453
Citations: Bibtex RefMan EndNote GB/T7714
Sutapa SARKAR, Biplab Kumar SIKDAR, Mousumi SAHA. Cellular automata based multi-bit stuck-at fault diagnosis for resistive memory[J]. Frontiers of Information Technology & Electronic Engineering, 2022, 23(7): 1110-1126.
@article{title="Cellular automata based multi-bit stuck-at fault diagnosis for resistive memory",
author="Sutapa SARKAR, Biplab Kumar SIKDAR, Mousumi SAHA",
journal="Frontiers of Information Technology & Electronic Engineering",
volume="23",
number="7",
pages="1110-1126",
year="2022",
publisher="Zhejiang University Press & Springer",
doi="10.1631/FITEE.2100255"
}
%0 Journal Article
%T Cellular automata based multi-bit stuck-at fault diagnosis for resistive memory
%A Sutapa SARKAR
%A Biplab Kumar SIKDAR
%A Mousumi SAHA
%J Frontiers of Information Technology & Electronic Engineering
%V 23
%N 7
%P 1110-1126
%@ 2095-9184
%D 2022
%I Zhejiang University Press & Springer
%DOI 10.1631/FITEE.2100255
TY - JOUR
T1 - Cellular automata based multi-bit stuck-at fault diagnosis for resistive memory
A1 - Sutapa SARKAR
A1 - Biplab Kumar SIKDAR
A1 - Mousumi SAHA
J0 - Frontiers of Information Technology & Electronic Engineering
VL - 23
IS - 7
SP - 1110
EP - 1126
%@ 2095-9184
Y1 - 2022
PB - Zhejiang University Press & Springer
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DOI - 10.1631/FITEE.2100255
Abstract: This paper presents a group-based dynamic stuck-at fault diagnosis scheme intended for resistive random-access memory (ReRAM). Traditional static random-access memory, dynamic random-access memory, NAND, and NOR flash memory are limited by their scalability, power, package density, and so forth. Next-generation memory types like ReRAMs are considered to have various advantages such as high package density, non-volatility, scalability, and low power consumption, but cell reliability has been a problem. Unreliable memory operation is caused by permanent stuck-at faults due to extensive use of write- or memory-intensive workloads. An increased number of stuck-at faults also prematurely limit chip lifetime. Therefore, a cellular automaton (CA) based dynamic stuck-at fault-tolerant design is proposed here to combat unreliable cell functioning and variable cell lifetime issues. A scalable, block-level fault diagnosis and recovery scheme is introduced to ensure readable data despite multi-bit stuck-at faults. The scheme is a novel approach because its goal is to remove all the restrictions on the number and nature of stuck-at faults in general fault conditions. The proposed scheme is based on Wolfram's null boundary and periodic boundary CA theory. Various special classes of CAs are introduced for 100% fault tolerance: single-length-cycle single-attractor cellular automata (SACAs), single-length-cycle two-attractor cellular automata (TACAs), and single-length-cycle multiple-attractor cellular automata (MACAs). The target micro-architectural unit is designed with optimal space overhead.
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