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18 results found in all.

index	Title
1	Co-design for an SoC embedded network controller Author(s):Zou Lian-ying, Zou Xue-cheng Clicked:6689 Download:3856 Cited:0 <Full Text> Journal of Zhejiang University Science A 2006 Vol.7 No.4 P.591-596 DOI:10.1631/jzus.2006.A0591
2	Design and FPGA verification of a novel reliable real-time data transfer system Author(s):Yu-ping LIAN, Yan HAN, Ming-xu HUO, Jin-long CHEN, Yan ZHANG Clicked:8317 Download:4186 Cited:1 <Full Text> Journal of Zhejiang University Science A 2008 Vol.9 No.10 P.1406-1410 DOI:10.1631/jzus.A0720123
3	High-performance hardware architecture of elliptic curve cryptography processor over GF(2¹⁶³) Author(s):Yong-ping DAN, Xue-cheng ZOU, Zheng-lin LIU, Yu HAN, Li-hua YI Clicked:7097 Download:4387 Cited:5 <Full Text> Journal of Zhejiang University Science A 2009 Vol.10 No.2 P.301-310 DOI:10.1631/jzus.A0820024
4	Gradual refinement for application-specific MPSoC design from Simulink model to RTL implementation Author(s):Kai HUANG, Xiao-lang YAN, Sang-il HAN, Soo-ik CHAE, Ahmed A. JERRAYA, Katalin POPOVICI, Xavier GUERIN, Lisane BRISOLARA, Luigi CARRO Clicked:7378 Download:4804 Cited:3 <Full Text> Journal of Zhejiang University Science A 2009 Vol.10 No.2 P.151-164 DOI:10.1631/jzus.A0820085
5	DPLL implementation in carrier acquisition and tracking for burst DS-CDMA receivers Author(s):GUAN Yun-feng, ZHANG Zhao-yang, Lai Li-feng Clicked:5737 Download:3295 Cited:1 <Full Text> Journal of Zhejiang University Science 2003 Vol.4 No.5 P.526-531 DOI:10.1631/jzus.2003.0526
6	An efficient radix-2 fast Fourier transform processor with ganged butterfly engines on field programmable gate arrays Author(s):Zhen-guo Ma, Feng Yu, Rui-feng Ge, Ze-ke Wang Clicked:12010 Download:4029 Cited:1 <Full Text> Journal of Zhejiang University Science C 2011 Vol.12 No.4 P.323-329 DOI:10.1631/jzus.C1000258
7	A floating point conversion algorithm for mixed precision computations Author(s):Choon Lih Hoo, Sallehuddin Mohamed Haris, Nik Abdullah Nik Mohamed Clicked:10026 Download:4570 Cited:0 <Full Text> Journal of Zhejiang University Science C 2012 Vol.13 No.9 P.711-718 DOI:10.1631/jzus.C1200043
8	A 10 Gbps in-line network security processor based on configurable hetero-multi-cores Author(s):Yun Niu, Li-ji Wu, Yang Liu, Xiang-min Zhang, Hong-yi Chen Clicked:10454 Download:4488 Cited:2 <Full Text> <PPT> 2935 Journal of Zhejiang University Science C 2013 Vol.14 No.8 P.642-651 DOI:10.1631/jzus.C1200370
9	A multimode digital controller IC for flyback converter with high accuracy primary-side feedback Author(s):Jian-ping Qiu, Le-nian He, Yu-lin Wang Clicked:9948 Download:4689 Cited:9 <Full Text> <PPT> 2966 Journal of Zhejiang University Science C 2013 Vol.14 No.8 P.652-662 DOI:10.1631/jzus.C1200344
10	A VHDL application for kinematic equation solutions of multi-degree-of-freedom systems Author(s):Hüseyin Oktay Erkol, Hüseyin Demirel Clicked:9793 Download:4531 Cited:1 <Full Text> <PPT> 2967 Journal of Zhejiang University Science C 2014 Vol.15 No.12 P.1164-1173 DOI:10.1631/jzus.C1400120
11	Side-channel attacks and learning-vector quantization Author(s):Ehsan Saeedi, Yinan Kong, Md. Selim Hossain Clicked:10473 Download:4291 Cited:0 <Full Text> Frontiers of Information Technology & Electronic Engineering 2017 Vol.18 No.4 P.511-518 DOI:10.1631/FITEE.1500460
12	Recent advances in efficient computation of deep convolutional neural networks Author(s):Jian Cheng, Pei-song Wang, Gang Li, Qing-hao Hu, Han-qing Lu Clicked:11848 Download:4531 Cited:0 <Full Text> <PPT> 2607 Frontiers of Information Technology & Electronic Engineering 2018 Vol.19 No.1 P.64-77 DOI:10.1631/FITEE.1700789
13	Synchronization stability between initial-dependent oscillators with periodical and chaotic oscillation Author(s):Fu-qiang Wu, Jun Ma, Guo-dong Ren Clicked:6326 Download:3940 Cited:0 <Full Text> <PPT> 2447 Journal of Zhejiang University Science A 2018 Vol.19 No.12 P.889-903 DOI:10.1631/jzus.A1800334
14	Correlation power attack on a message authentication code based on SM3 Author(s):Ye Yuan, Kai-ge Qu, Li-ji Wu, Jia-wei Ma, Xiang-min Zhang Clicked:9311 Download:3534 Cited:0 <Full Text> <PPT> 2204 Frontiers of Information Technology & Electronic Engineering 2019 Vol.20 No.7 P.930-945 DOI:10.1631/FITEE.1800312
15	Design and implementation of various datapath architectures for the ANU lightweight cipher on an FPGA Author(s):Vijay Dahiphale, Gaurav Bansod, Ankur Zambare, Narayan Pisharoty Clicked:8106 Download:4066 Cited:0 <Full Text> <PPT> 2222 Frontiers of Information Technology & Electronic Engineering 2020 Vol.21 No.4 P.615-628 DOI:10.1631/FITEE.1800681

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