| index | Title |
| 1 | Design of a novel low power 8-transistor 1-bit full adder cell Author(s):Yi Wei, Ji-zhong Shen Clicked:12594 Download:11649 Cited:3 <Full Text> Journal of Zhejiang University Science C 2011 Vol.12 No.7 P.604-607 DOI:10.1631/jzus.C1000372 |
| 2 | Introducing scalable 1-bit full adders for designing quantum-dot cellular automata arithmetic circuits Author(s):Hamideh KHAJEHNASIR-JAHROMI, Pooya TORKZADEH, Massoud DOUSTI Clicked:7937 Download:6088 Cited:0 <Full Text> <PPT> 1131 Frontiers of Information Technology & Electronic Engineering 2022 Vol.23 No.8 P.1264-1276 DOI:10.1631/FITEE.2100287 |
| 3 | An efficient counter-based Wallace-tree multiplier with a hybrid full adder core for image blending Author(s):Ayoub SADEGHI, Nabiollah SHIRI, Mahmood RAFIEE, Mahsa TAHGHIGH Clicked:6031 Download:10046 Cited:0 <Full Text> <PPT> 1300 Frontiers of Information Technology & Electronic Engineering 2022 Vol.23 No.6 P.950-965 DOI:10.1631/FITEE.2100432 |
