CLC number: TN4; TN75
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Received: 2008-04-08
Revision Accepted: 2009-03-05
Crosschecked: 2009-10-18
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Li-jia CHEN, Hua-feng ZHANG, Jin-fang ZHOU, Kang-sheng CHEN. Efficient design of rotary traveling wave oscillator array via geometric programming[J]. Journal of Zhejiang University Science A, 2009, 10(12): 1815-1823.
@article{title="Efficient design of rotary traveling wave oscillator array via geometric programming",
author="Li-jia CHEN, Hua-feng ZHANG, Jin-fang ZHOU, Kang-sheng CHEN",
journal="Journal of Zhejiang University Science A",
volume="10",
number="12",
pages="1815-1823",
year="2009",
publisher="Zhejiang University Press & Springer",
doi="10.1631/jzus.A0820774"
}
%0 Journal Article
%T Efficient design of rotary traveling wave oscillator array via geometric programming
%A Li-jia CHEN
%A Hua-feng ZHANG
%A Jin-fang ZHOU
%A Kang-sheng CHEN
%J Journal of Zhejiang University SCIENCE A
%V 10
%N 12
%P 1815-1823
%@ 1673-565X
%D 2009
%I Zhejiang University Press & Springer
%DOI 10.1631/jzus.A0820774
TY - JOUR
T1 - Efficient design of rotary traveling wave oscillator array via geometric programming
A1 - Li-jia CHEN
A1 - Hua-feng ZHANG
A1 - Jin-fang ZHOU
A1 - Kang-sheng CHEN
J0 - Journal of Zhejiang University Science A
VL - 10
IS - 12
SP - 1815
EP - 1823
%@ 1673-565X
Y1 - 2009
PB - Zhejiang University Press & Springer
ER -
DOI - 10.1631/jzus.A0820774
Abstract: This paper presents an efficient method for globally optimizing and automating component sizing for rotary traveling wave oscillator arrays. The lumped equivalent model of transmission lines loaded by inverter pairs is evaluated and posynomial functions for oscillation frequency, power dissipation, phase noise, etc. are formulated using transmission line theory. The resulting design problem can be posed as a geometric programming problem, which can be efficiently solved with a convex optimization solver. The proposed method can compute the global optima more efficiently than the traditional iterative scheme and various design problems can be solved with the same circuit model. The globally optimal trade-off curves between competing objectives are also computed to carry out robust designs and quickly explore the design space.
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