Journal of Zhejiang University

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index	Title
1	Design and FPGA verification of a novel reliable real-time data transfer system Author(s):Yu-ping LIAN, Yan HAN, Ming-xu HUO... Clicked:8267 Download:4155 Cited:1 <Full Text> Journal of Zhejiang University Science A 2008 Vol.9 No.10 P.1406-1410 DOI:10.1631/jzus.A0720123
2	Gradual refinement for application-specific MPSoC design from Simulink model to RTL implementation Author(s):Kai HUANG, Xiao-lang YAN, Sang-il ... Clicked:7342 Download:4781 Cited:3 <Full Text> Journal of Zhejiang University Science A 2009 Vol.10 No.2 P.151-164 DOI:10.1631/jzus.A0820085
3	A parallel and scalable digital architecture for training support vector machines Author(s):Kui-kang Cao, Hai-bin Shen, Hua-fe... Clicked:10400 Download:3884 Cited:6 <Full Text> Journal of Zhejiang University Science C 2010 Vol.11 No.8 P.620-628 DOI:10.1631/jzus.C0910500
4	An efficient radix-2 fast Fourier transform processor with ganged butterfly engines on field programmable g... Author(s):Zhen-guo Ma, Feng Yu, Rui-feng Ge,... Clicked:11944 Download:4009 Cited:1 <Full Text> Journal of Zhejiang University Science C 2011 Vol.12 No.4 P.323-329 DOI:10.1631/jzus.C1000258
5	A floating point conversion algorithm for mixed precision computations Author(s):Choon Lih Hoo, Sallehuddin Mohamed... Clicked:9965 Download:4554 Cited:0 <Full Text> Journal of Zhejiang University Science C 2012 Vol.13 No.9 P.711-718 DOI:10.1631/jzus.C1200043
6	High-speed, fixed-latency serial links with Xilinx FPGAs Author(s):Xue Liu, Qing-xu Deng, Bo-ning Hou... Clicked:9864 Download:4751 Cited:1 <Full Text> Journal of Zhejiang University Science C 2014 Vol.15 No.2 P.153-160 DOI:10.1631/jzus.C1300249
7	A VHDL application for kinematic equation solutions of multi-degree-of-freedom systems Author(s):Hüseyin Oktay Erkol, Hüseyin Dem... Clicked:9734 Download:4491 Cited:1 <Full Text> <PPT> 2958 Journal of Zhejiang University Science C 2014 Vol.15 No.12 P.1164-1173 DOI:10.1631/jzus.C1400120
8	Side-channel attacks and learning-vector quantization Author(s):Ehsan Saeedi, Yinan Kong, Md. Seli... Clicked:10441 Download:4251 Cited:0 <Full Text> Frontiers of Information Technology & Electronic Engineering 2017 Vol.18 No.4 P.511-518 DOI:10.1631/FITEE.1500460
9	Recent advances in efficient computation of deep convolutional neural networks Author(s):Jian Cheng, Pei-song Wang, Gang Li... Clicked:11801 Download:4481 Cited:0 <Full Text> <PPT> 2595 Frontiers of Information Technology & Electronic Engineering 2018 Vol.19 No.1 P.64-77 DOI:10.1631/FITEE.1700789
10	Synchronization stability between initial-dependent oscillators with periodical and chaotic oscillation Author(s):Fu-qiang Wu, Jun Ma, Guo-dong Ren Clicked:6257 Download:3897 Cited:0 <Full Text> <PPT> 2437 Journal of Zhejiang University Science A 2018 Vol.19 No.12 P.889-903 DOI:10.1631/jzus.A1800334
11	Correlation power attack on a message authentication code based on SM3 Author(s):Ye Yuan, Kai-ge Qu, Li-ji Wu, Jia-... Clicked:9283 Download:3494 Cited:0 <Full Text> <PPT> 2195 Frontiers of Information Technology & Electronic Engineering 2019 Vol.20 No.7 P.930-945 DOI:10.1631/FITEE.1800312
12	Design and implementation of various datapath architectures for the ANU lightweight cipher on an FPGA Author(s):Vijay Dahiphale, Gaurav Bansod, An... Clicked:8072 Download:4022 Cited:0 <Full Text> <PPT> 2215 Frontiers of Information Technology & Electronic Engineering 2020 Vol.21 No.4 P.615-628 DOI:10.1631/FITEE.1800681
13	Dynamic analysis, FPGA implementation, and cryptographic application of an autonomous 5D chaotic system wit... Author(s):Sifeu Takougang Kingni, Karthikeya... Clicked:9660 Download:9048 Cited:0 <Full Text> Frontiers of Information Technology & Electronic Engineering 2020 Vol.21 No.6 P.950-961 DOI:10.1631/FITEE.1900167
14	Implementation of PRINCE with resource-efficient structures based on FPGAs Author(s):Lang Li, Jingya Feng, Botao Liu, Y... Clicked:11663 Download:9109 Cited:0 <Full Text> <PPT> 2228 Frontiers of Information Technology & Electronic Engineering 2021 Vol.22 No.11 P.1505-1516 DOI:10.1631/FITEE.2000688
15	A BCH error correction scheme applied to FPGA with embedded memory Author(s):Yang Liu, Jie Li, Han Wang, Debiao... Clicked:7968 Download:9848 Cited:0 <Full Text> <PPT> 2383 Frontiers of Information Technology & Electronic Engineering 2021 Vol.22 No.8 P.1127-1139 DOI:10.1631/FITEE.2000323